1. Field of Invention
The present invention relates generally to read-only memories (ROMs), and more particularly to a three-dimensional, deep-trench, high-density ROM and its manufacturing method.
2. Description of Related Art
Read-only memories (ROMs) are nonvolatile semiconductor memories used in computer and microprocessor systems for permanently storing programs and data that are repeatedly used, such as BIOS (Basic Input/Output System, used in operating systems of personal computers). ROM manufacturing involves very complicated and time-consuming processes requiring costly equipment and material. Therefore, customers typically first define the data to be permanently stored in ROMs, and then provide the data to the ROM manufacturer for programming into the ROMs. The ROM manufacturer encodes the customer programs into the ROM, before delivering back the coded ROM to the customers.
A major issue for ROM manufacturers is reducing the occupation of ROM components on a surface of a semiconductor wafer, so to lower cost and increase market share. However, in conventional ROMs, the gates comprise polysilicon layers formed above the wafer surface. Gate formation necessitates the use of photo-stepper machines in which the distance between two gate polysilicon layers cannot be reduced in an efficient manner, increasing the surface area occupation of ROM components as well as manufacturing costs. Further, conventional ROM manufacturing requires ion implantation after encoding, which generates an alignment shift that leads to transistor cell leakage problems.
A conventional ROM structure is shown in FIGS. 1A-1C. FIG. 1A is a top view, FIG. 1B is a cross-sectional view taken along line IB--IB of the ROM of FIG. 1A, and FIG. 1C is a cross-sectional view taken along line IC--IC of the ROM of FIG. 1A.
Conventional ROM manufacturing includes forming source/drain regions 11 above a substrate 10, and then forming a gate oxide layer 12 and a polysilicon gate region 13 above source/drain regions 11. Regions 11 are referred to as "source/drain region" since they can act as either a source or a drain terminal depending upon the actual assignment of metallic wiring connections. Conventional ROM manufacturing further comprises forming a transistor in areas 14 enclosed by the dashed lines of FIG. 1A.
When programming is required, referring to FIG. 1C, ROM formation further comprises coating a photoresist layer 15 on polysilicon gate region 13, exposing only areas of the transistor cells where a permanent OFF-state is desired, and switching off a channel region 16 using an ion implantation operation. Since polysilicon gate regions 13 are all formed above the same planar surface of substrate 10, a definitive distance is required to isolate gate regions 13. Hence, the surface area occupation of the ROM cannot be reduced.